1. Field of the Invention
The present invention relates to active pixel solid state photosensors and imagers using CMOS technology.
2. Description of the Related Art
Active pixel solid state sensors and devices for detecting electromagnetic radiation are well known and in widespread use. When mounted in camera systems, pixel arrays serve as vision or image sensors which produce electrical signals corresponding to the detected light levels. Examples of such photosensors are disclosed in EP739039 and in WO93/19489. These sensors, implemented using CMOS- or MOS-technology, utilize collection junctions which are regions adapted for collecting charges generated by radiation in the semiconductor substrate. The collection junctions are either p-n or n-p junctions, depending on whether the substrate is of p-type or n-type conductivity, respectively.
An active pixel is configured with circuitry integrated in the pixel to amplify the charge that is collected on the light sensitive element or component in the pixel. Active pixels may also be equipped with additional electronics for more elaborate functions, such as filtering, high speed operation, or operation in more extreme illumination conditions. Conversely, passive pixels do not have such circuitry, so they require charge-sensitive amplifiers which are connected to the pixel via a conductive wire or line of metallization. However, one primary drawback of active pixel CMOS or MOS sensors is that a significant part of the pixel surface is used for the detection circuitry, thereby limiting the collection area for each pixel.
Because all photon-generated charges within a recombination length from the collection junction have a chance of diffusing to, and being collected by, the junction, the charge sensitive volume of a collection junction is larger than the junction's depletion layer. Based on this mechanism, a sensor with a small collection junction can have a larger photosensitive volume. For example, photosensors with an apparent front size or photosensitive region of approximately 30 μm diameter can be made with junctions of 3 μm by 2 μm and with a recombination length of 15 μm. However, for active pixels which contain other circuitry (e.g. detection circuitry), some charges that would otherwise have reached the collection junction are instead captured by the junctions or components of the additional circuitry. These charges taken by the pixel's additional circuitry are therefore lost and do not contribute to the detected signal. This is a principal reason for the low fill factor or low sensitivity of active pixel sensors.
It is known in the art that photodiode dark current (i.e. current not caused by detected electromagnetic radiation) is primarily due to thermal generation of charge carriers at the edges of the photodiode, or at the interface between the silicon and SiO2. This dark current can be significantly reduced by a method called “inversion mode” or “all phase pinning” in which the Si—SiO2 interface is brought into inversion by applying a dopant layer to the surface of the photodiode. This dopant layer prevents contact between the buried channel (i.e. the useful detecting volume collecting junction) and the Si—SiO2 interface. This method typically reduces the dark current by a factor of approximately two orders of magnitude.
An example of an active pixel device prior to the present invention is represented by Lee et al., U.S. Pat. No. 5,625,210 “ACTIVE PIXEL SENSOR INTEGRATED WITH A PINNED PHOTODIODE”, which illustrates integrating a n-well CMOS pinned photodiode with a transfer gate into an image sensing element of an active pixel element. As shown in FIG. 1, the p-type substrate 24 forms a p-n photodiode with the n-well region 22 which becomes the photoactive element and stores the photoelectrons created by photons impinging onto the p-type substrate 24 of the pixel. “Burying” the n-well 22 under a p+ pinning dopant region 20 creates an electrostatic potential which contributes to the confinement of confines the collected photoelectrons deeper within the photodiode in the deeper n-region. Because the collected charge in the photodiode junction is then prevented from touching the Si—SiO2 interface 30, the recombination of photoelectrons in the n-well 22 with generation of dark current at electronic states generation centers at the interface is suppressed. The electrostatic potential created by the pinning dopant region 20 also reduces the influence of any oxide layer charge on the junction potential. Such photodiodes sensors also have better ionization radiation tolerances This buried photodiode also has a low dark current because the electrostatic potential of the pinning dopant region 20 effectively shields the n-well 22 from charge carriers thermally generated at the surface or Si—SiO2 interface. Such photosensors also have better ionization radiation tolerances.
The pinning dopant region 20 of the photodiode also reduces the capacitance of the collection junction, which reduces the kTC noise of the sensor and the possibility of “ghost” images; i.e. relics of prior frames' bright images in subsequent dark frames. The so-called kTC noise, one of the primary sources of noise in imaging sensors, is typically expressed as an amount of noise charge (i.e. uncertainty of the measurements of the photo-generated charge), and it is proportional to the square root of the capacitance of the collection junction. Therefore any reduction of capacitance equates to a reduction of the kTC noise. The pinning dopant layer 20 reduces the capacitance of the collection junction by raising the minimum of the electrostatic potential well in which the photoelectrons are confined. When this potential well is shallower than the transfer bias of the transfer gate 28, the photodiode can be completely depleted or reset in a shorter amount of time. Therefore, with a sufficient reduction of the sensor's capacitance by the pinning dopant layer 20, all of the photoelectrons can be transferred to the detection circuitry n-well 26 by turning on the transfer gate 28, leaving no charge in the potential well to contribute to a later frame's image.
A MOSFET is formed by the transfer gate 28 above the p-type substrate 24 between the charge collection n-well 22 and the CMOS detection circuitry n-well 26. Application of a sufficient voltage to the transfer gate 28 forms a depletion region between the two n-wells 22 and 26, thereby providing an n-channel for charge transfer between the pinned photodiode and the floating diffusion CMOS detection circuitry. The transfer gate 28 is the gate or electrode that controls the conditional transfer of charges between a photodiode (or other structure containing charge, e.g. a storage gate) to a register. The sole function of the transfer gate 28 is as a switch, which creates the charge transfer channel when appropriately biased.